1. Field of the Invention
This invention relates to an electronic circuit that suppresses electromagnetic noise emissions from integrated circuits, and, in particular, relates to an electronic circuit that is capable of meeting stricter standards for the suppression of electromagnetic noise emissions.
2. Description of Related Art
A variety of integrated circuits (ICs, LSI chips, etc.) imparted with microcomputer and logic circuit functionalities have been used as the basic components of various electronic and information devices. During the operation of such integrated circuits as active devices, their power consumption does not remain constant and varies from moment to moment, thereby causing the power supply voltage of the power supply lines supplying drive voltage to the integrated circuits to fluctuate from instant to instant in response to variations in load. This voltage fluctuation leads to electromagnetic noise emissions (EMI) from the integrated circuit.
One method used to keep the emission of electromagnetic noise into the environment by such an integrated circuit during its operation in compliance with regulatory values involves in interposing a bypass capacitor between the power supply line of the integrated circuit and the ground. However, when electromagnetic noise emitted from a circuit operating at high frequencies, i.e. an integrated circuit, is suppressed by using a bypass capacitor, the impedance of the traces connected to the integrated circuit cannot be ignored and, therefore, the bypass capacitor has to be placed at a location in close physical proximity to the integrated circuit operating as an active device.
FIG. 9 and FIG. 10 illustrate the configuration of a conventional electronic circuit fitted with a bypass capacitor as a means for suppressing electromagnetic noise emissions. FIG. 9 is an enlarged cross-sectional view of the main body of the conventional electronic circuit, and FIG. 10 is an enlarged plan view of the main body. It should be noted that FIG. 9 shows a cross-sectional configuration of the portion shown by the arrow line x-x′ in FIG. 10.
As shown in FIG. 9, the conventional electronic circuit 500 includes an LSI chip used as an integrated circuit 51, a circuit substrate 53, and a bypass capacitor 57.
The integrated circuit 51 is flip-chip mounted to the circuit substrate 53 through multiple bump electrodes 52 formed on one of its major surfaces, 51a. Multiple electrode pads 55 are formed on the mounting surface 53a of the circuit substrate 53 at locations corresponding to the locations of placement of the bump electrodes 52 of the integrated circuit 51. In addition, device-mounting electrodes 56, which are used for mounting the bypass capacitor 57, are formed on the back surface 53b of the circuit substrate, and the electrode pads 55 are connected to the device-mounting electrodes 56 by through wire interconnects 54 formed in the circuit substrate 53. Electrode terminals 58 at both ends of the bypass capacitors 57 are connected to the second electrode pads 56, thereby mounting the bypass capacitor 57 on the back surface 53b of the circuit substrate 53.
FIG. 10 shows a planar configuration of the conventional electronic circuit 500, as viewed from the back surface 53b of the circuit substrate 53, in other words, from the side used to mount the bypass capacitor 57. It should be noted that, in order avoid overcomplicating the drawing, the first pad electrodes 55 and through wire interconnects 54 formed in the circuit substrate 53 have been omitted from the drawing.
As shown in FIG. 10, in the conventional electronic circuit 500, multiple bypass capacitors 57 are placed on, and secured to, the back surface 53b of the circuit substrate 53 such that the placement locations of the respective electrode terminals 58 correspond to the locations of formation of the bump electrodes 52, which are aligned in a regular two-dimensional matrix configuration on the major surface of the integrated circuit 51. Furthermore, in the conventional electronic circuit 500, the respective bypass capacitors 57 are placed such that electric currents flow in the same direction in all of them, and, for this reason, the device-mounting electrodes 56 formed on the back surface 53b of the circuit substrate 53 are formed in the shape of strips extending vertically in FIG. 10, with the electrode terminals 58 of the multiple bypass capacitors 57 connected to the strip-shaped device-mounting electrodes 56.
As shown in FIG. 9 and FIG. 10, in the conventional electronic circuit 500, the bump electrodes 52 of the integrated circuit 51 and the electrode terminals 58 at both ends of the bypass capacitor 57 are placed such that they are in alignment in the thickness direction of the circuit substrate 53 together with the through wire interconnects 54 that provide a connection therebetween. Thus, in the conventional electronic circuit 500, the bump electrodes 52 of the integrated circuit 51 and the electrode terminals 58 of the bypass capacitor 57 are connected across the narrowest distance via the through wire interconnects 54 of the circuit substrate 53, which makes it possible for both of them to be placed in the closest physical proximity and prevents trace impedance from reducing the inhibiting effect on the high-frequency component of the electromagnetic radiation.
Furthermore, other disclosures of technologies for suppressing the emission of electromagnetic noise from integrated circuits using bypass capacitors have described a technology in which bypass capacitors are integrated into ICs in order to bring the integrated circuits and the bypass capacitors closer together (JP 2000-183286A), and a technology that makes use of bypass capacitors with different resonance frequencies, wherein the bypass capacitors are placed such that the closer they are to the power supply terminal, the lower their resonance frequency becomes (JP 2007-48879A).
In recent years, the magnitude of the supply currents required by LSI chips, ICs, and other integrated circuits has been on the increase. In addition, the regulatory values applicable to electromagnetic noise emissions (EMI) gradually have become more stringent due to concerns about preventing adverse effects on the human body and interference with other electronic circuits. In such a situation, it has become increasingly difficult to reduce electromagnetic noise emitted from integrated circuits to within the desired numerical values using the conventional approaches, in which bypass capacitors are placed in the closest possible proximity to the source of the noise, i.e. the integrated circuits.
The object of the invention disclosed in this application, which solves such prior-art problems, is to provide an electronic circuit that includes a circuit substrate having mounted thereon an integrated circuit, i.e. a noise source, and bypass capacitors, and that is capable of satisfying stringent regulatory requirement values for electromagnetic noise emissions.